Toshiba 74VHCT126AFT Non-Inverting 3 State Octal Bus Buffer, 14-Pin TSSOP

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ตัวเลือกบรรจุภัณฑ์ / Packaging Options :
RS Stock No.:
171-3560
หมายเลขชิ้นส่วนของผู้ผลิต / Mfr. Part No.:
74VHCT126AFT
ผู้ผลิต:
Toshiba
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เลือกทั้งหมด

Brand

Toshiba

Logic Family

74VHCT

Product Type

Octal Bus Buffer

Logic Function

Buffer

Schmitt Trigger Input

No

Input Type

CMOS

Mount Type

Surface

Output Type

3 State

Polarity

Non-Inverting

Package Type

TSSOP

Minimum Supply Voltage

4.5V

Maximum Supply Voltage

5.5V

Pin Count

14

Maximum Propagation Delay Time @ CL

3.8ns

Maximum High Level Output Current

-8mA

Minimum Operating Temperature

-40°C

Maximum Low Level Output Current

8mA

Maximum Operating Temperature

125°C

Height

1mm

Width

4.4 mm

Standards/Approvals

No

Length

5mm

Supply Current

4μA

Automotive Standard

AEC-Q100

The 74VHCT125AFT and 74VHCT126AFT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The 74VHCT125AFT requires the 3-state control input G to be set high to place the output into the high impedance state, whereas the 74VHCT126AFT requires the control input G to be set low to place the output into high impedance. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. There structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.

Wide operating temperature range: Topr = -40 to 125 

High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5.0 V

Quiescent supply current: ICC = 4.0 μA (max) at Ta = 25 

Compatible with TTL input: VIL = 0.8 V(max)

VIH = 2.0 V(min)

Power down protection is provided on all inputs and outputs.

Balanced propagation delays: tPLH ≈ tPHL

Low noise: VOLP = 0.8 V (max)

Pin and function compatible with the 74 series

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