Microchip, 32bit AVR32, AT32 Microcontroller, 60MHz, 128 kB Flash, 64-Pin TQFP

AVR32 is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions.
To fully exploit the power of a 32-bit architecture, the AVR32 is not binary compatible with earlier AVR architectures. In order to achieve high code density, the instruction format is flexible providing both compact 16-bit and extended 32-bit instructions. While most instructions are 16-bit, powerful 32-bit instructions are implemented to further increase performance. Compact and extended instructions can be freely mixed in the instruction stream.

The Microchip AT32UC3B 32-bit System-On-Chip microcontroller is based on the AVR32 UC RISC processor running at frequencies up to 60 MHz. It operates on single 3.3V or dual 1.8V to 3.3V power supply. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. It incorporates on-chip Flash and SRAM memories for secure and fast access. The Peripheral Direct Memory Access controller enables data transfers between peripherals and memories without processor involvement, also drastically reduces processing overhead when transferring continuous and large data streams between modules within the MCU. It features many communication interfaces for communication intensive applications. In addition to standard serial interfaces like USART, SPI or TWI, other interfaces like flexible Synchronous Serial Controller and USB are available. The USART supports different communication modes, like SPI mode.

Performing up to 1.39 DMIPS / MHz
Memory Protection Unit
Seven Peripheral DMA Channels Improves Speed for Peripheral Communication
Internal High-Speed Flash of 128 Kbytes
Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
Auto vectored Low Latency Interrupt Service with Programmable Priority
Supports I2S and Generic Frame-Based Protocols
Package type of 64-pin TQFP/QFN (44 GPIO pins)