Digilent 410-300 GENESYS2 KINTEX-7 Development Board

The Digilent Genesys 2 board is a digital circuit development platform based on the Kintex-7™ Field Programmable Gate Array (FPGA) from Xilinx. Genesys 2 is well suited for data and video processing applications. Genesys 2 is compatible with Vivado Design Suite as well as the ISE toolset, which includes ChipScope and EDK.

• 50950 logic slices each with 4 x 6-input LUTs and 8 x flip-flops
• Close to 16Mbits of fast block RAM
• 10 x clock management tiles, each with phase-locked loop (PLL)
• 840 x DSP slices
• Internal clock speeds exceeding 450MHz
• On-chip analogue-to-digital converter (XADC)
• Up to 10.3125Gbps gigabit transceivers
• 1800Mbps DDR3 data rate with 32-bit data width
• Commercial -2 speed grade

• On-board 2 x MT41J256M16HA-107 1GiB DDR3 SDRAM memory
• On-board S25FL256S 256Mbit Quad-SPI serial NOR Flash memory
• On-board ADAU1761 SigmaDSP stereo audio CODEC
• On-board FT2232R USB-UART bridge controller
• On-board RTL8211E-VL Ethernet PHY
• 0.91in 128 x 32pixel OLED display
• microSD card slot
• On-board USB-JTAG programming via microUSB connector
• JTAG 6-pin header
• RJ45 socket for 10/100/1000 Ethernet LAN
• USB-A OTG 2.0 socket
• USB-A Host MSD/HID socket
• HDMI display (source) socket
• HDMI display (sink) socket
• DisplayPort (source) mDP socket
• DisplayPort (sink) mDP socket
• VGA display (16-bit colour) DE15 socket
• HPC FMC 400-pin connector with 10 x GTX lanes
• 4 x 3.5mm jack sockets for Microphone, Line In, Line Out, Headphones
• 5 x 12-pin Pmod™ expansion connectors
• +12Vdc power supply barrel jack socket
• Cooling fan for FPGA device
• Power slide-switch
• Reset pushbutton
• Programming pushbutton
• 8 x User slide-switches
• 5 x User pushbuttons
• Power LED
• Programming Done LED
• Ethernet Activity LEDs
• 8 x User LEDs

USB-A to Micro-B cable

For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.

An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.